An integrated circuit receiver is exposed to a external signals. Therefore, in order to protect it and other circuits contained on the integrated circuit device, several functions must be provided. These include electrostatic discharge protection, transmission line signal clamping and latch-up protection. Additionally, a receiver is required to provide adequate drive for an on-chip load. Also, in certain instances, a boundary scan multiplexing capability is provided for test. Conventionally, these functions have been implemented with several different, separate structures. For example, electrostatic discharge protection may be provided by specialized avalanche breakdown devices. Transmission line signal clamping might be handled with off-chip resistors. Latch-up protection and adequate drive for the on-chip load have been implemented with a large buffer with field effect transistor gate inputs (the gate oxide prevents excessive off-chip voltages from reaching the chip diffusion). Boundary scan multiplexing (the ability to switch off an input away from the input pin in order to test the latch within the chip) has been left for the internal chip logic designer to incorporate.
The following prior art illustrates pass gate or transfer gate receiving circuits. IBM Technical Disclosure Bulletin, Vol. 19, No. 5, Oct. 1976, entitled "FET Signal Receiver for TTL Circuits" illustrates a simple pass gate circuit of the prior art.
IBM Technical Disclosure Bulletin, Vol. 29, No. 12, May, 1987, entitled "Fast Level Convertor Circuit" illustrates a pass gate connected to a buffer, which is the conventional method for providing load driving capabilities.
IBM Technical Disclosure Bulletin, Vol. 28, No. 8, Jan., 1986, entitled "General Purpose Interface Receiver Using Short Channel CMOS Devices" illustrates a CMOS receiver circuit.
IBM Technical Disclosure Bulletin, Vol. 28, No. 9, Feb., 1986, entitled "Medium Power, Minimum-Area Clamping Circuits for Bipolar Applications" illustrates a clamping circuit.
IBM Technical Disclosure Bulletin, Vol. 31, No. 2, July, 1988, entitled "High Speed ECL BIFET Receiver for High End Systems" also illustrates a receiver circuit.
IBM Technical Disclosure Bulletin, Vol. 16, No. 5, Oct., 1973, entitled "Low Power Gated Receiver" also illustrates a CMOS receiver circuit.
IBM Technical Disclosure Bulletin, Vol. 31, No. 2, July, 1988, entitled "High Performance Off-Chip Common I/O Circuit" discloses, in functional form, an input/output circuit with separate functional modules indicating separate functional components.
Electrostatic discharge protection is shown in several references. The first is IBM Technical Disclosure Bulletin, Vol. 23, No. 3, Aug., 1980, entitled "Electrostatic Discharge Protection Device for Current Switch Receivers" which shows the use of an electrostatic discharge diode.
IBM Technical Disclosure Bulletin, Vol. 26, No. 7A, Dec., 1983, entitled "ESD-Protected TTL Receiver for FET Products" illustrates a non-integrated approach for providing electrostatic discharge protection.
IBM Technical Disclosure Bulletin, Vol. 23, No. 4, Sept., 1980, entitled "Multiple I/O Protection With Single Protective Device" discloses a single protected device that is connected across several inputs for a receiver.
IBM Technical Disclosure Bulletin, Vol. 20, No. 12, May, 1978, entitled "Low-Powered Dissipation Push-Pull Driver" illustrates a receiver that includes clamping protection in the forum of an active terminator.
IBM Technical Disclosure Bulletin, Vol. 25, No. 3A, Aug., 1982, entitled "Low Voltage Invertor Receiver Circuit" illustrates an invertor receiver circuit that includes an ESD function, a clamping circuit and a receiving circuit. However, these functions are accomplished by separate elements of the same function.
It is an object of the present invention to provide a pass gate multiplexer receiver circuit that is integrated, in that the components within the pass gate circuit provide several of the functions, such as electronic discharge protection and transmission line signal clamping.